000 00429 a2200157 4500
020 _a8129700921
082 _a621.392
_bPAL
090 _c15965
_d24104
100 _aPalnitkar, Samir
245 _aVerilog HDL
_ba guide to digital design and synthesis
250 _a2nd.
260 _aDelhi
_bPearson education
_c2003
_g2003
300 _a490p.
_c24cm.
650 _aSYSYEMS ANALYSIS AND DESIGN COMPUTER ARCHITECTURE
942 _cL
999 _c44008
_d44008